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WiFiPCController-Hardware.txt

WiFiPCController-Hardware.txt 2.2 KB
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  3. 

  4. 

  5. 

  6. 

  7. GPIOs 4 and 5 are the only ones that are always high impedance. All others do have internal pull-ups or are even driven low/high during boot.
    8. 

  8. GPIOs 3, 12, 13 and 14 pulled HIGH during boot. Their actual state does not influence the boot process.
    9. 

  9. GPIOs 0, 1, 2 and 15 are pulled HIGH during boot and also driven LOW for short periods.
    10. 

  10. The device will not boot if 0, 1 or 2 is driven LOW during start-up.
    11. 

  11. GPIO 16 is driven HIGH during boot, don't short to GND. 
    12. 

  12. 

  13. 

  14. http://rabbithole.wwwdotorg.org/2017/03/28/esp8266-gpio.html
    15. 

  15. 

  16. GPIO Behaviour Summary
    17. 

  17. D0 	16 	High 	High during boot, falls after ~110ms (to ~1V?) 	High during boot, falls after ~110ms (to ~1V)
    18. 

  18. D1 	5 	Low 	Low 	Low
    19. 

  19. D2 	4 	Low 	Low 	Low
    20. 

  20. D3 	0 	Low then oscillates 	Varies, stabilizes high after ~100ms 	Varies, stabilizes low after ~110ms
    21. 

  21. D4 	2 	Varies, stabilizes high after ~60ms 	Varies, stabilizes high after ~70ms 	Varies, stabilizes low after ~110ms
    22. 

  22. D5 	14 	High 	High, then low after ~110ms 	High, then low after ~110ms
    23. 

  23. D6 	12 	High 	High, then low after ~110ms 	High, then low after ~110ms
    24. 

  24. D7 	13 	High 	High, then low after ~110ms 	High, then low after ~110ms
    25. 

  25. D8 	15 	Low 	Low, with glitch ~110ms 	Low, with glitch ~110ms
    26. 

  26. D9 	3 	Low 	Low until ~50ms then high 	Low until ~50ms then high until ~110ms then low
    27. 

  27. D10 	1 	Low 	Low until ~50ms then high 	Low until ~50ms then high until ~110ms then low
    28. 

  28. 

  29. Conclusion: GPIOs D1 and D2 are the only safe GPIOs I can use to drive relays if I don’t want them to operate autonomously at boot. I will have to rework my PCB:-(
    30. 

  30. 

  31. D3, D4 dürfen während dem boot nicht auf low gezogen werden, sonst bootet der ESP nicht -> nicht als Eingang zu gebrauchen, außer für Taster die während des bootens 
    32. 

  32. ziemlich sicher nicht betätigt werden. 
    33. 

  33. 

  34. 

  35. Daher folgende Pin-Zuordnung:
    36. 

  36. D1/GPIO5 -> power switch
    37. 

  37. D2/GPIO4 -> reset switch
    38. 

  38. 

  39. Ausgangsbeschaltung zur Ansteuerung von POWER und RESET:
    40. 

  40. GPIO mit active HIGH logik
    41. 

  41. ext. Pulldown-Widerstand -> Basiswiderstand auf NPN-Transistor
    42. 

  42. Collector ist Schaltausgang und kommt parallel zum jeweiligen Eingang am Mainboard
    43. 

  43. sollte bei den beiden "safe" GPIOs kein Problem machen
    44. 

  44. 

  45. Eingang von Power-LED: 
    46. 

  46. NPN-Transistor mit Basiswiderstand von POWER_LED, Collector zieht GPIO auf GND wenn LED aktiv
    47. 

  47.